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CXA3018R
Demodulator for Satellite Receivers
Description The CXA3018R is an IC designed for video signal demodulation for satellite broadcasting. This IC has most of the functions needed for demodulation, and provides stable video detection in combination with the CXA3008N. Features * PLL demodulation characteristics through built-in IF AGC * Compatible with both NTSC and PAL * Applicable for 8 systems worldwide * Keyed AFT input pin to support MUSE reception * Output pin for 1st AGC control * Built-in video clamp circuit * C/N detection circuit * Single 5 V power supply operation Applications NTSC/PAL system satellite receivers, etc. Structure Bipolar silicon monolithic IC 48 pin LQFP (Plastic)
Absolute Maximum Ratings (Ta = 25 C) * Supply voltage VCC -0.3 to 7.0 * Operating temperature Topr -35 to +85 * Storage temperature Tstg -55 to +150 Operating Supply Voltage VCC
V C C
4.50 to 5.50
V
Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.
--1--
E95719-TE
Block Diagram
SWC IN SWB IN
MTRX AGC
2nd IFAGC
OPAmpOUT
OPAmpIN N
OPAmpIN P
2ndAGCCONT
AGC LPF
LPF P
LPF N
36 1AGC 2AGC DCAMP AGCAMP 22 OSCE1 AGC DET MIX VCO
35
34
33
32
31
30
29
28
27
26
25
SWA IN
24 OSCB2 23 OSCE2 21 OSCB1
RF VCC
MTRX AGC
VCC1 37
IF1 38
IF2 39
RF GND
GND1 40 OFF SET SWAMP LOGIC
OSC GND VIDEO GND
SYNC 10 11 12
GCONT 41
20 GND3 19 VCODR1
DETOUT 42
VREG 48
VIDEO VCC
SH2
SH1
ANA2
ANA1
CNIN
AFT UP
CNLPF
AFT DOWN
KEYED IN
CNCONT
CNOUT
BGR C
--2--
BUF CLAMP1 DEEM/VAMP AFT CLAMP2 REG CNDET
BUFIN 43
18 VCODR2 17 GND2
BUFOUT 44
VAMPIN 45
16 VAMP OUT
OFFSETADJ 46
15 VIDEO IN 14 SYNC IN
VCC2 47
13 CLAMP OUT
1
2
3
4
5
6
7
8
9
CXA3018R
CXA3018R
Pin Description Pin No. Symbol Typical pin voltage DC AC Equivalent circuit
VCC2
Description
1
AFT UP
30k
2
AFT DOWN
4.9 V or 0.1 V
1
2
AFT block digital output pins.
30k GND2
3
ANA2
1.3 V to 3.2 V
4
VCC2 2k
200 75k 200 2.5V GND2 VCC2 150 5 30k GND2 VCC2 2k 2k 200 4k
AFT block filter pin. Connect to Pin 4 with a 47 k resistor and to GND with a 10 F capacitor.
3
4
ANA1
3.1 V
AFT block reference output pin.
5
KEYED-IN
0.3V
AFT block keyed input pin.
6
SH2
3.0 V to 3.5 V 3.0 V to 3.5 V
6
7
7
SH1
AFT block sample-and-hold signal output pins. Connect to GND with a 0.1 F capacitor.
GND2 VCC2
12k
12k 20k 2.2V 2k 20k GND2 VCC2
8
CNIN
2.1V
-50 to -20 dBm
150
8
C/N detection block signal input pin.
9
CNCONT
1.6 V to 4.4 V
9
150
3V 20k 8k 5.7k 8k GND2
C/N detection block gain adjustment pin.
--3--
CXA3018R
Pin No.
Symbol
Typical pin voltage DC AC
Equivalent circuit
VCC2 8k 8k 200
Description
10
CNLPF
2.9 V
10 200
C/N detection block filter pin. Connect to GND with a 0.01 F capacitor.
GND2
VCC2 100
11
CNOUT
1.2 V to 3.7 V
60k 11 4k GND2
C/N detection block output pin. Connect to GND with a 1nF capacitor.
VCC2 100
12
BGR-C
0.9 V
12
1.3k
40k
4k GND2
C/N detection block reference output pin. Connect to GND with a 1 F capacitor.
13
CLAMP OUT SYNC IN VIDEO IN
2.0 V
1.0 Vp-p
5k 15 150
VCC2 13
Clamp block video output pin.
14
1.4 V
Clamp block sync input pin.
14
15
2.0 V
1.0 Vp-p
GND2
Clamp block video input pin.
VCC2 20k 12k
16
VAMP OUT
2.0 V
1.0 Vp-p
16 46k 2k 2k GND2
Video amplifier block video output pin.
17
GND2
0V
VCC1 50 50
GND pin.
18
VCODR2
2.0 V to 3.0 V
18 19 10k 10k GND1
PLL detection output pins.
19
VCODR1
--4--
CXA3018R
Pin No. 20 21 22 23 24 25
Symbol GND3 VCOB1 VCOE1 VCOE2 VCOB2 SW A-IN
Typical pin voltage DC AC 0V 1.4 V 0.7 V 0.7 V
24 23
Equivalent circuit GND pin.
VCC1 21 3k 250 250 3k 22 20k
Description
VCO constant setting pins.
1.4 V
GND3
VCC1 25 40k
26
SW B-IN
--
26 40k 27 50k
2.5V 50k GND1
Switching amplifier and video amplifier mode setting pins.
27
SW C-IN
VCC1
28
LPF-N 4.5 V
260 28 29
260
Mixer constant setting pins.
GND1
29
LPF-P
VCC1 30
30
AGC-LPF
2.9 V to 3.0 V
150 30k
AGC detection block filter pin. Connect to GND with a 0.01 F capacitor.
GND1
VCC1
31
2ndAGC CONT
1.0 V to 3.0 V
150 31
45k
AGC detection block gain adjustment pin.
GND1
32
OPAmp IN-P --
32
VCC1 100 100 150 150 33
AGC detection block 1st AGC input pins.
33
OPAmp IN-N
GND1
--5--
CXA3018R
Pin No.
Symbol
Typical pin voltage DC AC
Equivalent circuit
Description
100
34
OPAmp OUT
0.3 V or 3.5 V
34 5k GND1
AGC detection block 1st AGC digital output pin.
35
2nd IF AGC MTRXAGC VCC1 IF1
36 37 38
2.0 V to 3.0 V 2.0 V to 3.5 V 5V
38 39
VCC1 100 40k
AGC detection block 2nd AGC analog output pin. AGC detection block MTRX-AGC analog output pin. Positive power supply pin.
35 36 10k GND1
10p
5k 2.3V
10p
400
5k
AGC block IF input pins.
39
IF2
GND1
40
GND1
0V
VCC2
GND pin.
41
GCONT
2.0 V to 4.0 V
150 41 12k 3k 2.7V
Switching amplifier block gain adjustment pin.
GND2
VCC2 200
42
DETOUT
2.45 V
200 mVp-p
42 43 GND2
Switching amplifier block video output pin.
43
BUFIN 2.0 V 200 mVp-p
44
100
200
VCC2
BUFF video input pin.
43
150
44
BUFOUT
10k GND2
BUFF video output pin.
--6--
CXA3018R
Pin No.
Symbol
Typical pin voltage DC AC
Equivalent circuit
VCC2
Description
45
VAMPIN
2.5 V
100 mVp-p
45
Video amplifier block video input pin.
GND2 VCC2
46
OFFSET ADJ
2.0 V to 4.0 V
46
150
AFT block offset adjustment pin.
GND2
47
VCC2
5V
VCC2
Positive power supply pin.
48
VREG
4.1 V
48 GND2
Reference voltage output pin. Connect to GND with a 10 F capacitor.
--7--
CXA3018R
Electrical Characteristics DC Characteristics (Ta = 25 C, VCC = 5 V, See the Electrical Characteristics Measurement Circuit.) Pin Symbol Condition 37, 47 ICC 34 VAGC1H Pin 31=3.0V 34 VAGC1L Pin 32=2.5V Vin=-10dBm, 35 VAGC2H Pin 31=3.0V Vin=-60dBm, 35 VAGC2L Pin 31=3.0V Vin=-10dBm, 36 VMTRH Pin 31=3V, Pin 32=2.5V Vin=-60dBm, 36 VMTRL Pin 31=3V, Pin 32=2.5V 18, 19 VVCD 400MHz input Load resistance 18, 19 IVCD RL = 1 k 48 VREG Min. 70 3.0 0.1 2.5 1.5 3.0 1.5 2.0 2.0 3.9 3.5 2.3 2.5 2.5 4.15 Typ. 100 3.5 0.3 2.9 Max. 130 3.7 1.0 3.3 2.6 3.7 2.7 3.0 -- 4.4 mA V V Unit mA
Item 1 Current consumption 2 AGC-1 High output voltage 3 AGC-1 Low output voltage 4 AGC-2 High output voltage 5 AGC-2 Low output voltage 6 7 8 9 10 AGC-MTRX High output voltage AGC-MTRX Low output voltage VCODR1/2 output voltage VCODR1/2 driver current capacitance VREG output voltage
AC Characteristics (AGC) Item 11 IF input frequency 12 IF input level 1st AGC change point 13 (input level) 14 1st AGC control sensitivity
(Ta = 25 C, VCC = 5 V, See the Electrical Characteristics Measurement Circuit.) Pin Symbol 38, 39 fin 38, 39 34 34 34 35 35 36 Vin AGC1 AGC1 AGC1/V AGC2 AGC2/V MTRX Condition One amplitude at balance input Pin 31=2.5V, Pin 32=2.5V Slope of variation Variation of change point / Pin 32 DC variation Slope of variation Variation of change point / Pin 31 DC variation Slope of variation Min. -- -60 -40 -- -- -24 3 -- 0.8 42 -18 11 0.3 -- -- -12 18 -- V/dB dB/V mV/dB dB/V V/dB Typ. 400 Max. -- -10 dBm Unit MHz
15 1st AGC adjustment sensitivity 16 2nd AGC control sensitivity 2nd AGC adjustment 17 sensitivity 18 AGC-MTRX control sensitivity
--8--
CXA3018R
AC Characteristics (PLL) Item 21 VCO conversion sensitivity 22 VCO oscillator frequency 23 PLL capture range
(Ta = 25 C, VCC = 5 V, See the Electrical Characteristics Measurement Circuit.) Pin Symbol fosc CAP Condition 1 1 Min. 32 -- Typ. 37 400 40 0.68
--
24 DETOUT level 25 DETOUT level variable range 26 GCONT adjustment sensitivity 27 DETOUT frequency response (8 MHz)
42 42 42 42
Sum of the positive / -- negative 1 VOUT Dev.=17MHzpp 0.60 VdB VOUT=0dB, p41=0.5V -3.0 Output level / Pin 41 DC VOUT 5 variation VOUTf 8MHz/1MHz -1.0
Max. Unit 42 MHz/V -- MHz -- 0.76 2.5 9 1.0 Vp-p dB dB/V dB
7 0.0
1 Varies according to external constant (coil, varicap). This characteristic is for NTSC. Also, operates with 480 MHz for PAL.
AC Characteristics (Video)
(Ta = 25 C, VCC = 5 V, See the Electrical Characteristics Measurement Circuit.) Pin 13 13 13 13 13 13 13 13 13 Symbol Condition VCO Dev.=17MHzpp VAMPIN input VCOf 5MHz / 1MHz VCOfA IF input 5MHz/1MHz DGA DPA IMA DISP1 IF input IF input IF input IF input 1 1 Min. -- -1.6 -2.5 0 -4 40 40 -- 55 Typ. 1.0 0.0 0.0 1.8 0 45 45 0.5 64 Max. -- 1.6 dB 2.5 5 4 -- -- 1.0 -- % deg dB IRE dB Unit Vp-p
Item 31 CLAMP OUT output level CLAMPOUT frequency 32 response IF clamp output frequency 33 response (5 MHz) 34 IF clamp output DG 35 IF clamp output DP 36 fsc beat suppression 37 Dispersal elimination ratio CLAMPOUT residual 38 dispersal distortion 39 IF clamp output S/N
DISP2 IF input CSN IF input
1 Varies according to external constant (coil, varicap).
--9--
CXA3018R
AC Characteristics (AFT/CN) (Ta = 25 C, VCC = 5 V, See the Electrical Characteristics Measurement Circuit.) 1: Input voltage VCNIN enable to adjust output voltage VCNO = 2 V 41 42 43 44 45 46 Item AFT f0 adjustment range AFToffset adjustment sensitivity AFTdead zone width AFTUP/AFTDOWN Low AFTUP/AFTDOWN High CN detection level Symbol Condition fAFT Offset from 2nd IF f0 variation / Pin 46 DC fAFT/V variation fAFT/D 1, 2 AFTL 1, 2 AFTH 11 VCNO -40dB input (Pin 9=3V) -40dB input 11, 9 VCNOW (Pin 9=2 to 4V) Variation from VCNO CNOUT voltage / CNIN 11, 8 VCN input level (-50 to -30dBm) Input level variation / Pin 9 DC variation 11, 8 VCN/Vc In case of adjusting output voltage VCNO=2 V Pin Min. -5 -18 90 0 4.7 1.6 -0.15 Typ. -- -9 180 0.1 4.9 2.0 -- Max. Unit +5 MHz -3 MHz/V 360 0.4 VCC 2.4 0.25 kHz V V V V
47 CN adjustment range
48 CN sensitivity
-60
-50
-40
mV/dB
49 CN adjustment sensitivity
-10
-7.5
-5
dB/V
SWAMP Control Table Gain control applicable to satellite receivers Pin 25 Pin 26 Pin 27 Format Satellite SWA SWB SWC 1 2 3 4 5 6 7 8 H H H H L L L L H H L L H H L L H L H L H L H L BS JC-SAT SCC ASIA-SAT (NTSC) COPER NICUS U-TEL SAT ASTRA ASIA-SAT (PAL)
Deviation (MHz/V) 17.0 15.8 18.0 21.6 22.5 25.0 16.0 20.0
Gain deviation against BS (dB) 0.0 0.7 -0.5 -1.8 -2.3 -3.2 0.5 -1.4
Remarks positive positive positive negative positive positive positive negative
NTSC
PAL
Control Table Pin No. 5 14 25 26 27 Symbol Min. 0.0 LOW Typ. Max. 0.1 0.8 2.0 2.0 2.0 Min. 0.3 HIGH Typ. Max. Unit Remarks AFT clamp circuit ON when pulse input is Low during keyed AFT Clamp circuit ON when Low Gain SW applicable to satellite receivers
KEYEDIN SYNCIN SWA SWB SWC
V V V V V
0.0 0.0 0.0
3.0 3.0 3.0 --10--
VCC VCC VCC
CXA3018R
Description of Operation This IC consists of the following six function blocks. First, the signal flow is explained briefly, followed by the functions of each block. (1) AGC block (2) FM demodulation block (3) SWAMP block of video signal processor (4) CLAMP & VAMP blocks of video signal processor (5) AFT block (6) C/N detection block The 2nd IF differential signal input to Pins 38 and 39 passes through the AGC block to stabilize the signal level and is then input to the FM demodulation block. The FM demodulated signal is then input to the SWAMP and AFT blocks of video signal processor. The SWAMP block outputs the detective signal from DETOUT after adjusting the gain to support worldwide video systems. The detective signal output becomes the final video signal by being input to the CLAMP & VAMP blocks through an external de-emphasis time constant block and an LPF. Also, part of the detective signal output is input to the C/N detection block through an external BPF. The AFT block detects the frequency lag of the 2nd IF signal by the voltage value of the detective signal output, and outputs a command signal to the external frequency conversion block in order to correct the local frequency. The C/N detection block detects noise outside the video band and has a voltage output to indicate the C/N noise level that is input (1st IF signal) to the receiver. (1) AGC block The 2nd IF differential signal is input to Pins 38 and 39 to fix the signal level with the AGC block. Connect a capacitor which fixes the AGC loop time constant to Pin 30, and apply an adjustment voltage at the output setting level of this AGC (2nd AGC) to Pin 31. The 2nd AGC control voltage is output from Pin 35. Apply the starting level adjustment voltage of the 1st AGC for the 1st IF to Pin 32. Input the Pin 35 output to Pin 33 through a 10 k resistor and the Pin 36 output through a 0.1 F capacitor. Output the 1st AGC control voltage from Pin 34, and output the voltage obtained by adding the 1st AGC control voltage of the Pin 34 output to the 2nd AGC control voltage of the Pin 35 output from Pin 36. (2) FM demodulation block The FM demodulation block is a PLL demodulator which consists of an oscillator (OSC), phase discriminator and DCAMP. Connect the oscillator resonance circuit to Pins 21 to 24 and the loop filter to Pins 28 and 29. The DCAMP differential output comes from Pins 18 and 19, and this output is used as the drive voltage for the varicap that comprises the oscillator. (3) SWAMP block of video signal processor The SWAMP block of video signal processor amplifies only gains selected by LOGIC and outputs detective signal output from Pin 42. The output from Pin 42 is output externally as the DETOUT (detective output) signal. This signal enters an internal buffer from Pin 43 through the de-emphasis time constant block, and is then output again from Pin 44. The Pin 44 BUFOUT output is input to VAMPIN after the high frequency component outside of the video band is removed by an external LPF. LOGIC controls SWAMP according to corresponding satellite switching commands (3 bits) input from Pins 25 to 27. In addition, the SWAMP gain is finely adjusted by applying the DETOUT level adjustment voltage from Pin 41. --11--
CXA3018R
(4) CLAMP & VAMP blocks of video signal processor The signal input from VAMPIN is sync-tip clamped by CLAMP1 and input to the VAMP block. VAMP selects NTSC or PAL gain according to the NTSC/PAL switching commands from the LOGIC block. The gain is output from Pin 16 after being amplified to the proper level (1 Vp-p for sync tip to 100 % WHITE). The Pin 16 output signal is input to CLAMP2 from Pin 15 where it is sync-tip clamped again. CLAMP1 & 2 are enabled by the CLAMP pulse which is input to Pin 14. The CLAMP1 & 2 blocks eliminate the triangular wave components (15 to 30 Hz) which overlap with the video signal for the energy diffusing signal. The final video signal is output from Pin 13. (5) AFT block This block detects frequency error in the 2nd IF signal as a voltage displacement from the FM demodulation signal which is input to the AFT block, and outputs the two values of High (5 V) or Low (0 V) from Pins 1 and 2. High indicates the frequency change command (active-High). Furthermore, High output from both pins indicates the dead zone. Connecting an LPF capacitor to Pin 3, applying the reference voltage to Pin 4, and connecting a resistor between Pins 3 and 4 changes the AFTAMP gain, thereby allowing the dead zone width to be changed. Input the keyed pulse for keyed AFT to Pin 5. The Pin 5 voltage should be 0 V during mean value AFT. Connect sample-and-hold capacitors to Pins 6 and 7. Apply the offset adjustment voltage to Pin 46 to cancel the effects of the DC offset inside the IC. (6) C/N detection block Extract the noise component from the DETOUT signal output from Pin 42 with an external BPF and input it to the C/N detection block from Pin 8. Output the C/N conversion output from Pin 11. Apply the C/N detection adjustment voltage to Pin 9, connect an LPF capacitor to Pin 10, and connect a decoupling capacitor for the voltage source for correcting temperature characteristics to Pin 12. (7) Other Connect a capacitor to cancel the regulator voltage noise to Pin 48, and use this output as the reference voltage for internal adjustment.
--12--
0.1
0.1
V V
22k
V
V V V V V
V
0.1
10k
100k
4.7k
0.1
0.1
V
10k 22k 4.7k 10k 22k
100k
0.1
36 34
LPF-P LPF-N
35 VCOB2 24
33
32
31
30
29
28
27
26
25
37 VCC1
V
10k
4.7k
SW B-IN SW A-IN
SW C-IN
MTRX-AGC
2ndIFAGC
V V
41 GCONT 42 DETOUT 43 BUFIN
1k
40 GND1 GND3 20 VCODR1 19 CXA3018R VCODR2 18 GND2 17 VAMPOUT 16 VIDEOIN 15 SYNCIN 14
CNLPF CNOUT BGR-C
1k
2ndAGCCONT
39 IF2
OPAmpOUT
OPAmpIN-N
OPAmpIN-P
AGC-LPF
38 IF1
VCOE2 23
V V
47
VCOE1 22 VCOB1 21
100k
1n
V
V V
V
44 BUFOUT 45 VAMPIN
46 OFFSETADJ
Electrical Characteristics Measurement Circuit 1
1n
V
10
V
V V V
AFTUP
AFTDOWN
ANA2
ANA1
SH2
5.0V
10
KEYED-IN
SH1
CNIN
CNCONT
5.0V 0.1 0.1 0.1 0.1 0.1 0.1
0.1
1n
51
V
47 100k 0.1
CXA3018R
Application circuits shown are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits or for any infringement of third party and other right due to same.
0.1
1
--13--
47 VCC2 48 VREG
100k
1n
V
V 1 2 V V V V V V 3 4 5
10
CLAMP 13 OUT 12
V
A V
V
6
7
8
9
11
V
V
22k
10k
100p
0.1
10p 10k 22k 4.7k 15p 10k 22k 4.7k VC 2T 10k 47 VC 2T 9p 15p 10T
0.01
1k
100k
0.1
4.7k
100k
0.1
36 VCOB2 24
9p
35
34
33
32
31
30
29
28
27
26
25
LPF-P LPF-N
IF IN
37 VCC1 VCOE2 23
15p
SW B-IN SW A-IN
VCOE1 22 VCOB1 21 GND3 20
1k
MTRX-AGC
2ndIFAGC
1n
40 GND1
DETOUT
1.5k
47
41 GCONT VCODR1 19 CXA3018R VCODR2 18 GND2 17 VAMPOUT 16 VIDEOIN 15
0.1 33k 1k 1k 0.47 22k 1k 47 5.0V
100k
1n
42 DETOUT
470p 330
43 BUFIN
1k
2k
44 BUFOUT
0.1 47 100k
Electrical Characteristics Measurement Circuit 2
LPF
45 VAMPIN
1k
270
SH2
KEYED-IN
SH1
CNIN
AFTUP
CNCONT
AFTDOWN
CNLPF
ANA2
100k
10
ANA1
CNOUT
1
0.1 0.1 47 10 47k 0.01 1
2
3 7 8 9
10 11 12
4
5
6
BGR-C
VIDEO IN (+DISP IN)
48 VREG
CLAMP 13 OUT
VIDEO OUT
KEYED IN
51
V
CN IN
CN OUT
0.1
CXA3018R
100k
1n
100k
47 VCC2 SYNCIN 14
51
--14--
5.0V
1n
46 OFFSETADJ
2ndAGCCONT
39 IF2
OPAmpOUT
OPAmpIN-N
OPAmpIN-P
AGC-LPF
SW C-IN
38 IF1
1
VIDEO IN
OPAmpOUT C32
VCC3
Application Circuit
MTRX AGC
H/L
100k
SWC SWB SWA
GND
VCC
VR6
VR5
10k
100k
R35 0.1
C23
C21
100p
1n
C26
1n
C34
C33
1n
0.01
C22
C1
C4
10 VCC1
VCC2
GND1
GND2
GND3
VCC3
47
MTRX AGC
OPAmpIN P
AGC LPF
SWC IN
OPAmpIN N
OPAmpOUT
LPF N
2nd IFAGC
C2
36 24
C230
OSCB2
35
34
33
32
2nd AGCCONT
31
30
LPF P
29
28
27
SWB IN
26
SWA IN
10p
R25 1k
25
C241
VCC1 OSCE2
1n
VCC1
37 23 22 21 20 19 18 17 16 15 14 13
9P
IF-IN
IF1
15P C231 15P C221
38
2T
IF2
39
OSCE1
100k
C220
VR1
GND1
40
OSCB1
9P
VCC3
15P C211 15P GND3
2T
AUDIO-OUT
5.73M BPF
GCONT
C3
41
10T VCODR1
VCC3
C29 R32
R31
1.5k
2k
R442
R18
BUFOUT
2SA1175
44
GND2
1k R17
1k
R45
270
100k
VR2
C9
10
1
ANA2 AFT UP ANA1 R5
2
3
4
5
C12 SH2
6
0.1 C13 SH1
7
CNIN 0.1
CNCONT
CNOUT
AFT DOWN
C9
1n CNLPF
C10
10 47k KEYED IN
100k
C14
C16
1
CXA3018R
AFT DOWN AFT UP
KEYED IN
VR3
0.01
VCC3
CNOUT
VIDEO OUT C15 1n
11.5M BPF
BGR C
8
9
10
11
12
VIDEO AMP +6DB
R13
1k R14
1k
--15--
1n
DETOUT
42
BUFIN
43
VCODR2
470p 330
4.5M LPF
2SC2785
C28
VAMPIN
45
VAMP OUT 2SC2785 C18 VIDEO IN
VCC3 2SC2785
0.1
OFFSETADJ
C6
46
VCC3
VCC2
1n
VCC2
C7
47
SYNC IN
0.1 C17 0.47 CLAMP OUT
1n
VREG
48
CXA3018R
Pin 31 (2ndAGCCONT)=2.5V Pin 32 (OPAmpIN-p)=2.5V 4 3.5 3
Pin 35 2ndAGC OUT
AGC DET Characteristics
Pin 36 MTRX AGC OUT
VAMP frequency responce characteristics
Pin 34, 35 and 36 AGC OUT (V)
0
2.5 2 1.5 1
Pin 34 1stAGC OUT
VAMP OUT output level (dB)
0
-2
-4
0.5 0 -70 -6 0
-60
-50 -40 -30 -20 -10 Input signal level 400 MHz (dBm)
2
4 6 8 10 Input signal frequency (MHz)
12
14
AFT characteristics 5 4
CN sensitivity characteristics
AFT DOWN/AFT UP output level (V)
Pin 11 (CN OUT) output voltage (V)
Pin 2 AFTUP 4
Pin 1 AFTDOWN
3.5 3 2.5 Pin 9 CN CONT control voltage 2.5V 2.3V 2.1V -60 -50 -40 -30 Pin 8 (CN IN) Input level (dBm) -20 -10
3
2
2 1.5 1 -70
1 Pin 1 AFTDOWN 0 399 Pin 2 AFTUP 401
400 Input signal frequency (MHz)
(MIX OUT -pins 28 and 29 are shorted) Input level -40 dBm CN adjustment characteristics 2.6 Supply voltage dependent characteristics of VCDR1 output DC (compared with conventional product) 3.0
Pin 11 (CN OUT) output voltage (V)
2.4
2.8
Pin 19 VCDR1 (V)
CXA3018R 2.6
2.2
2
2.4 CXA1689R
1.8
2.2
1.6 1 1.5 2 2.5 3 3.5 4 CN CONT voltage (V) 4.5 5
2.0 4.50
4.75
5.00 Supply voltage (V)
5.25
5.50
--16--
CXA3018R
Package Outline
Unit: mm
48PIN LQFP (PLASTIC)
9.0 0.2 36 37 7.0 0.1 25 24
(8.0)
A 48 1 0.5 0.08 + 0.08 0.18 - 0.03 0.1 0.1 + 0.2 1.5 - 0.1 12 13
(0.22)
+ 0.05 0.127 - 0.02 0.1
0 to 10
0.5 0.2
NOTE: Dimension "" does not include mold protrusion. DETAIL A
PACKAGE STRUCTURE
PACKAGE MATERIAL SONY CODE EIAJ CODE JEDEC CODE LQFP-48P-L01 QFP048-P-0707-A LEAD TREATMENT LEAD MATERIAL PACKAGE WEIGHT EPOXY / PHENOL RESIN SOLDER PLATING 42 ALLOY
0.2g
--17--
0.5 0.2

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